1. Field of Invention
This invention relates to a DRAM (Dynamic Random Access Memory) cell of highly integrated semiconductor storage device, and to a method for manufacturing the same, and more particularly to a DRAM cell comprising a SDT (Side-wall Doped Trench capacitor) cell having a trench capacitor cell structure with a high concentration of selectively doped region on a silicon substrate, and a SDTSAC (Side-wall Doped Trench Capacitor using a Self-Aligned Contact) cell in the SDT cell structure for increasing the capacitance of the trench capacitor, and a method for manufacturing such cells.
2. Related Application
Photoresist etch back technology is fully described in a copending patent application, concurrently filed herewith, entitled: A Method For Manufacturing A Trench Capacitor Using A Photoresist Etch Back Process, by Yong Hyeock Yoon and Cheol Kyu Bok, inventors, assigned to Hyundai Electronics Industries Co., LTD., having U.S. Ser. No. 07/381,288, filed Jul. 18, 1989, now U.S. Pat. No. 4,994,409 granted Feb. 19, 1991, said application being expressly incorporated herein by reference as if fully set forth hereat.